1. Field of the Invention
The present invention is related to fractional-N phase locked loops. More particularly, the present invention relates to a novel digital fractional-N phase locked loop embodied in a novel variable data rate all digital clock synthesizer
2. Description of the Prior Art
There are not now commercially available any all digital phase locked loop integrated circuit devices. Further, there are no known all digital variable data rate clock synthesizers which employ all digital fractional-N phase locked loops.
There are analog fractional-N phase locked loop circuits which are shown and described in text books such as the third edition of "Frequency Synthesizers-Theory and Design" by Vadim Mannassewitsch; copyright 1987 by John Wiley & Sons, Inc. see section 1-5 "Fractional-N Phase locked Loop". Such circuits have been used in commercially available synthesized signal generators such as the Hewlett Packard Model HP-8662A.
It would be desirable to provide an all digital fractional-N phase locked loop of the type easily reduced to a single discreet integrated circuit chip device.